MARCO GSRC Technology Extrapolation (GTX)

Rule group

Naming conventions for parameters and rules

Revision 1.35, October 10, 2001

Andrew B. Kahng, Paul Lin, and Dirk Stroobandt

Observing the fact that we have lots of rules modifying lots of parameters, our main goal is to define parameter names such that
1. each parameter is identifiable through its name, i.e., one should be able to understand the meaning of the parameter by looking at its name;
2. each parameter is uniquely identified (i.e., no parameter has more than one name);
3. no two parameters have the same name.

This is only possible by strictly adhering to certain naming rules. From our experiences with name clashes and after having entered hundreds of parameter names, our naming conventions converged to the following.

Conventions for parameter names

Parameter names are composed of "literals" divided by underscores. The allowed literals (they are case-sensitive!) are grouped in different "literal lists": preposition literals, principal literals, place literals, qualifier literals, adverbial literals, index literals, and unit literals.

Following the notation "<X>" for replacement by a member of X, "[X]" for optional items, and "{X}" for repeated items -- 0 or more times -- (with all other characters mandatory), each parameter name must follow the naming rule:

[<preposition>]_<principal>_{[<qualifier>]_<place>}_{<qualifier>}_[<adverbial>]_[<index>]_[<unit>]

For each of those, the list of allowed literals is presented below, together with some explanation.

Preposition literals

There are few preposition literals (<preposition>). They are optional and precede the principal literals because they provide fundamental data about the parameter.

List of preposition literals:

<preposition> meaning

aux auxiliary parameter

const fundamental constants

delta delta (difference)

k factor/ratio/selector

timeline timeline (year)

Auxiliary parameters are used as a temporary, intermediate value and have no real meaning. The dimensional preposition literal "d" has been conjugated with its principal literal to form the principal literals "da" (area), "dl" (length), etc.

Principal literals

Principal literals (<principal>) are the core of the name. They tell us what the parameter really is. There must always be exactly one principal literal. The principal literal also sets the units of the parameter (shown between curly braces). These units can only be changed by adding a special literal or by a preposition literal (making it a factor or ratio).

List of principal literals:

<principal> meaning

E electrical field {V/m}

Energy energy {J}

I current {A}

J current density {A/m^2}

MU mobility {m^2/(V*s)}

N concentration: number of particles/energy states per unit volume {m^(-3)}

P power {W}

Z impedance {ohm}

C capacitance {F}

cost cost {$} or {man-year}

dA area {m^2}

depth depth {m}

defect defects {DIMLESS}

df feature size {m}

dh height {m}

dl length {m}

dp pitch {m}

dr diameter {m}

dv volume {m^3}

dspace space (between) {m}

dt thickness {m}

dw width {m}

eps permittivity {F*s/m^2}

f frequency {Hz}

flag boolean {DIMLESS}

g conductance {mho}

growth amount of growth (bases) {DIMLESS}

l inductance {H}

num number of (drivers, tiers, layers, etc.) {DIMLESS}

prob probability (uses preposition "k") {DIMLESS}

q (electric) charge {C}

r resistance {ohm}

rho resistivity {ohm*m}

t time {s}

temp temperature {K}

u permeability {H/m}

v voltage {V}

valref value at referenced year

vel velocity {m/s}

year calendar year

yield yield {DIMLESS}

<name> specific, well-known name (only allowed behind pre-positions "const" and "k")

<other> specific, unique name for auxiliary parameter (only allowed behind pre-position "aux")

The literal <name> can be any collection of letters but it is supposed to make sense. Principal literals that are not in the list can only be recognized as a <name> behind the prepositions "const" and "k". The literal <other> can be any collection of characters but this is only allowed behind the preposition "aux" and is supposed to prevent name clashes between different auxiliary parameters.

Place literals

Place literals (<place>) show the geometric location where the principal literal has its impact. They are optional and more than one of those can occur (with or without qualifier literals in between). Multiple place literals are ordered such that the most important one is placed first, e.g., we use c_in_inv for the "input capacitance of an inverter" because the stress lies on the fact that it is the "input" capacitance (and not the output capacitance). (Note: we might induce a preference relationship to clarify this because it can be rather arbitrary).

List of place literals:

<place> meaning

2par two parallel interconnect lines

3par three parallel interconnect lines

AA active area

FF flip-flop

FO4 fanout of four

IO input/output

M# metal layer #

NAND NAND gate

ambient ambient

asic application specific integrated circuit

bs bulk to source

batt battery

bit bit

bitcell bit-cell

board board

bottom bottom

bulk bulk

c2mos c^2mos

capW width and cap of drivers

carr carrier

cband conduction band

channel channel

chip chip

chippackage chip to package

clk clock

coax coaxial (cable)

contact contact

critpath critical path

cycle cycle

ds drain to source

dev device

dielectric dielectric

diode diode

drain drain

dram DRAM

drive drive (current)

driver driver

driver2int driver to interconnect

elect electrical

fblock functional block

fermi fermi (potential)

fermi2mid fermi to midgap (potential)

fet field effect transistor

fi fanin

fo fanout

g2d gate to drain

gs gate to source

gate (transistor/mos) gate

gnd ground

heatsink heatsink

in input

int interconnect or metal

interLD inter-layer dielectric

interface interface

intraLD intra-layer dielectric

inv inverter

junct junction

latch latch

level level

lcore logic core

lgate logic gate

light light

load2int load to interconnect

layer layer

mask masks

mid middle

memory memory

mpuasic MPU-asic

n n-type material, electron

net net

nfet NFET or NMOS

node (circuit) node

offchip off-chip

onchip on-chip

out output

outer outer

outmid outer and middle

ox oxide

p p-type material, hole

p2n pMOS to nMOS

package package/packaging

pad pad

padball padball

pin pin

pipeline pipeline

plates plates

pfet PFET or PMOS

pt2pt point to point

pulse pulse

pwr power

resist resist

rpt buffer or repeater

sd source to drain

seg segment

semi2ox semiconductor (polysilicon) to insulator

si silicon

sidewall sidewall

signal signal

source source

sram SRAM

ss surface state (density)

stage stage

substrate substrate

supply supply (voltage)

surface surface

top top

tristrip triplate strip line

tunnel tunneling

vband valence band

vdd vdd power

via via

wedge wedge bond

Qualifier literals

Qualifier literals (<qualifier>) can generally be used as adjectives to other literals (principal or place literals). They are always placed behind the literal they specify. They might also specify two or more literals in front of them. The order of several qualifier literals and of qualifier and place literals is again defined by their relative importance.

List of qualifier literals:

<qualifier> meaning

AC AC (current)

Cu Cu (metal)

DC DC (current)

above above

acceptor acceptor

active active/activity/activation

aggr aggressor (net)

array array

aspect aspect ratio

avail available

avg average

below below

bound bound

blockage blockage

cluster cluster(ed)

complex complex

const constant

couple coupling

crit critical

cumul cumulative (distribution model)

degrad degradation

delay delay

depl depletion

dens density (distribution)

design design (of the circuit/chip/system)

diff diffusion

dom domino logic family

donor donor

drawn drawn (e.g., drawn channel length)

dyn dynamic

eff effective

effi efficiency

equiv equivalent

exp exponent(ial)

ext external

fail failure

first first

field field

fit fit

footprint footprint

fringe fringe/fringing

fudge adjustment, tune

full full

func (work) function (eV)

gain gain

global global

half half

heal healing

high high

hist historical

intrinsic intrinsic

ideal ideal

internal internal

interval interval

intlimited interconnect limited

intro at introduction (low volume)

inversion inversion

lateral lateral

last last

leak leakage

level level

linear linear

local local

location location

logic logic

longest longest

lossless lossless

many man years

max maximum

median median

min minimum

minnum minimum number of

mut mutual

new new (logic)

nom nominal

nonprech non pre-charged

noovh no overhead

norm normalized

off off

on on (resistance)

open open circuit

opt optimum/optimal

overdrive overdrive

overlap overlap

overshoot overshoot

ovh overhead

par parallel

parasitic parasitic

path path

peak peak

penalty penalty

pentode pentode (region)

periph peripheral

physical physical

prech pre-charged

prime prime (')

prod productivity (in transistors/man-yr), or in production (high volume)

read read (memory)

relax relaxed/unstressed

required required

resrc resource in man-yr/transistors

reuse re-use (logic)

rise rise (time)

safety safety (factor)

sat saturation

self self

setup setup

sheet sheet (resistance)

shield shielding

short short circuit

single single (line)

skew skew

slew slew

slope slope

spec specific

stat static

stat2dyn static to dynamic

subth sub-threshold

swing swing (voltage)

system system

taper tapering (factor)

tech technology

th threshold

therm thermal

tnode technology node

tool design (EDA) tools

tot total

trans transition

trend trend

triode triode (region)

typ typical/characterized

up up

util utilization

used used

victim victim net

xchip across chip

xtalk crosstalk

withovh with overhead

write write (memory)

Adverbial literals

Adverbial literals (<adverbial>) are less important and are used to distinguish between several "situations". They are mainly used in an adverbial sense, e.g., c_int_couple_1gnd is the interconnect coupling capacitance under the assumption of one ground plane.

List of adverbial literals:

<adverbial> meaning

1gnd (assuming) one ground plane

2gnd (assuming) two ground planes

300K at 300 degrees Kelvin

50pct 50 percent

90pct 90 percent

DIBL drain-induced barrier lowering effect

EM (due to) electromigration

HH (output) high to high transition (remains high)

HL (output) high to low transition

LH (output) low to high transition

LL (output) low to low transition (remains low)

afactor a constant used to calculate v_ds_sat

bfactor a constant used to calculate v_ds_sat

bias bias

Boltzmann Boltzmann's constant

carrlimited carrier size limited

clm channel length modulation

cp cost performance

cvsl cascode voltage switch logic

dd (due to) drift diffusion

delay (because of) delay

early Early (voltage)

hf high field effect

hfsp high frequency signal pin

hce (under) hot carrier effect

hp high performance

lc low cost

Miller (including) Miller effect

model (using a/the) model

mpu MPU

Rent Rent's rule

skineffect (with) skin effect

SPICE SPICE related

te (under) thermionic emission

tspc true single phase clock

wiring (for the) wiring

Index literals

Index literals only contain Arabic or Roman numbers and are used for indexing.

Unit literals

Unit literals (<unit>) are always placed at the very end of the parameter name. They adjust the unit defined by the principal literal and are used to make a distinction between family members with different units. E.g., c_in_lgate_pu_dA and c_in_lgate_pu_dl are two distinct parameters: the first one requires an area parameter to produce the capacitance whereas the second one needs a length parameter. Such literals should not be used if the adjusted unit has its own principal literal. E.g., we use J for current density, not I_<...>_pu_dA.

List of unit literals:

<unit> meaning

pu_dA per unit area

pu_dl per unit length

pu_dp per unit gate pitch

udp in units of gate pitch

uchip in units of number of chips

The literal "pu" is never used alone. It should always be followed by a dimensional principal literal and is viewed together with this dimensional literal as a single literal.

Additional naming rules

When there is a subject-verb relationship between literals, the subject should precede the verb. E.g., in dA_lgate_intlimited (interconnect limited logic gate area), "int" is the subject and "limited" is the verb, and they are conjugated to form a single literal "intlimited", which modifies "lgate". There are not many instances of this rule.

The "from-to" relationship is indicated by a numeric "2" inserted between two literals (or two letters when their meanings are clear from the context). E.g. k_ratio_w2l_nmos_min refers to the minimum ratio of channel width over drawn channel length of a nmos for a target technology and dl_int_pt2pt_avg is the average point-to-point interconnect length.

Conventions for rule names

The convention for forming rule-names is currently to take the parameter name of the rule-output preceded by "RULE_" and followed by an "_" and an index <i> denoting it is the <i>-th rule that computes this parameter.

For the cycle-time models we have adopted the convention to change "RULE_" by the name of the model (e.g., "BACPAC_") to prevent name clashes for separate models. This convention is likely to change in the future but made automatic conversion of an old format to the engine grammar for rules easier.

abk@ucsd.edu